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<div class="header">
  <div class="headertitle"><div class="title">USB_OTG_GlobalTypeDef Struct Reference<div class="ingroups"><a class="el" href="group___c_m_s_i_s___device.html">CMSIS_Device</a> &raquo; <a class="el" href="group__stm32h723xx.html">Stm32h723xx</a></div></div></div>
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<p>USB_OTG_Core_Registers.  
 <a href="#details">More...</a></p>

<p><code>#include &lt;<a class="el" href="stm32h723xx_8h_source.html">stm32h723xx.h</a>&gt;</code></p>
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<tr class="heading"><td colspan="2"><h2 id="header-pub-attribs" class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
Public Attributes</h2></td></tr>
<tr class="memitem:a44d3a8825526e6f362da26bbdfb9c71d" id="r_a44d3a8825526e6f362da26bbdfb9c71d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a44d3a8825526e6f362da26bbdfb9c71d">GOTGCTL</a></td></tr>
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</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<div class="textblock"><p>USB_OTG_Core_Registers. </p>
</div><a name="doc-variable-members" id="doc-variable-members"></a><h2 id="header-doc-variable-members" class="groupheader">Member Data Documentation</h2>
<a id="a5c67046606b7e64fb03c4ac550156156" name="a5c67046606b7e64fb03c4ac550156156"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a5c67046606b7e64fb03c4ac550156156">&#9670;&#160;</a></span>CID</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t USB_OTG_GlobalTypeDef::CID</td>
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<p>User ID Register 03Ch </p>

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<a id="a8027d5b1a53306f5440506ae4915dd52" name="a8027d5b1a53306f5440506ae4915dd52"></a>
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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t USB_OTG_GlobalTypeDef::DIEPTXF[0x0F]</td>
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<p>dev Periodic Transmit FIFO </p>

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</div>
<a id="aa68d26991ddeec06897297c110c11503" name="aa68d26991ddeec06897297c110c11503"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa68d26991ddeec06897297c110c11503">&#9670;&#160;</a></span>DIEPTXF0_HNPTXFSIZ</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t USB_OTG_GlobalTypeDef::DIEPTXF0_HNPTXFSIZ</td>
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</div><div class="memdoc">
<p>EP0 / Non Periodic Tx FIFO Size Register 028h </p>

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</div>
<a id="a82cbf48acaac05bf1e9ed411ecbd7b8b" name="a82cbf48acaac05bf1e9ed411ecbd7b8b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a82cbf48acaac05bf1e9ed411ecbd7b8b">&#9670;&#160;</a></span>GADPCTL</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t USB_OTG_GlobalTypeDef::GADPCTL</td>
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<p>ADP Timer, Control and Status Register 60Ch </p>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t USB_OTG_GlobalTypeDef::GAHBCFG</td>
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<p>Core AHB Configuration Register 008h </p>

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<p>General Purpose IO Register 038h </p>

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<p>DFIFO Software Config Register 05Ch </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a4d0af4dfa531b5fcc09a421399963aaa">&#9670;&#160;</a></span>GHWCFG3</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t USB_OTG_GlobalTypeDef::GHWCFG3</td>
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<p>User HW config3 04Ch </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a42668fa352b82eb13164a99664956271">&#9670;&#160;</a></span>GINTMSK</h2>

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<p>Core Interrupt Mask Register 018h </p>

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<p>Core Interrupt Register 014h </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ae085e2623371c13a970c3caf3d322ed6">&#9670;&#160;</a></span>GLPMCFG</h2>

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<p>LPM Register 054h </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a44d3a8825526e6f362da26bbdfb9c71d">&#9670;&#160;</a></span>GOTGCTL</h2>

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<p>USB_OTG Control and Status Register 000h </p>

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<p>USB_OTG Interrupt Register 004h </p>

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<h2 class="memtitle"><span class="permalink"><a href="#af8b323b3ac27fa34523378367337c8d9">&#9670;&#160;</a></span>GPWRDN</h2>

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<p>Power Down Register 058h </p>

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<p>Core Reset Register 010h </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ade50afc41de620913eaf1bc66d93cd3a">&#9670;&#160;</a></span>GRXFSIZ</h2>

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<p>Receive FIFO Size Register 024h </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a060364111cf507dfab9bb6503477983a">&#9670;&#160;</a></span>GRXSTSP</h2>

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<p>Receive Sts Q Read &amp; POP Register 020h </p>

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<p>Receive Sts Q Read Register 01Ch </p>

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<p>Core USB Configuration Register 00Ch </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a99c998f37e7a88a26f22defb10a1e83a">&#9670;&#160;</a></span>HNPTXSTS</h2>

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<p>Non Periodic Tx FIFO/Queue Sts reg 02Ch </p>

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<p>Host Periodic Tx FIFO Size Reg 100h </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a978a73c27d2afe65def81f28b881e138">&#9670;&#160;</a></span>Reserved30</h2>

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<p>Reserved 030h </p>

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<p>Reserved 058h-0FFh </p>

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<p>Reserved 050h </p>

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<hr/>The documentation for this struct was generated from the following file:<ul>
<li>C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/CMSIS/Device/ST/STM32H7xx/Include/<a class="el" href="stm32h723xx_8h_source.html">stm32h723xx.h</a></li>
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